发明名称 |
UNDERFILL METHOD AND CHIP PACKAGE |
摘要 |
A method of fabricating a chip package is provided. The chip package includes a laminate, a chip and conductive elements interposed between the chip and the laminate by which signals are transmitted among the chip and the laminate. The method includes dispensing a first underfill in a space defined between opposing faces of the chip and the laminate and dispensing a second underfill at least at a portion of an edge of the chip, the second underfill including a high aspect ratio material.
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申请公布号 |
US2011037181(A1) |
申请公布日期 |
2011.02.17 |
申请号 |
US20090538965 |
申请日期 |
2009.08.11 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
GAYNES MICHAEL A.;KUMAR RAJNEESH;LOMBARDI THOMAS E.;OSTRANDER STEVE |
分类号 |
H01L23/28;H01L21/56 |
主分类号 |
H01L23/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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