发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 There is provided a semiconductor integrated circuit including a state detection enhancement circuit which includes an input terminal and an output terminal and has a function of generating an electric potential of a magnitude capable of performing nonvolatile memory writing into a nonvolatile memory circuit based on an electric potential input to the input terminal and outputting the electric potential of the magnitude to the output terminal, and the nonvolatile memory circuit has a nonvolatile memory function and an input terminal of the nonvolatile memory circuit is connected to the output of the state detection enhancement circuit. The state detection enhancement circuit is a positive or negative logical state detection enhancement circuit which includes a control signal terminal and a switch circuit which is turned on or off by a control signal applied to the control signal terminal, and has a function of either applying an output potential of the same logical state as or an inverse logical state of an input potential applied to the input terminal to the output terminal or completely breaking off a correlation between the input potential and the output potential when the switch circuit is in an OFF state, and has a function of applying an output potential which has the same logical state as or an inverse logical state of the input potential and has a larger highest-lowest potential range including a possible highest-lowest potential range of the input potential to the output terminal when the switch is in an ON state.
申请公布号 US2011038201(A1) 申请公布日期 2011.02.17
申请号 US20070513750 申请日期 2007.10.29
申请人 NATIONAL INSTITUTE OF ADVANCED IND.SCI AND TECH 发明人 TAKAHASHI MITSUE;SAKAI SHIGEKI
分类号 G11C11/4197;G11C11/40 主分类号 G11C11/4197
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