| 摘要 |
PROBLEM TO BE SOLVED: To provide an image processing device configured to share a processing block by a plurality of control blocks, particularly an image processing device capable of reducing an image processing time when each of the control blocks has a different clock domain. SOLUTION: A switching circuit which selects one of a first write pulse generated based on a signal from a CPU 100 and a second write pulse issued from a sequencer 200 is provided in the processing block. The sequencer 200 issues the second write pulse to the processing block at an optional time independent from the CPU 100. When the first write pulse and the second write pulse are competitive, the switching circuit selects the first write pulse first, then selects the second write pulse, and inputs the selected write pulse to a register. COPYRIGHT: (C)2011,JPO&INPIT
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