| 摘要 |
PURPOSE:To simplify a packet processing program and increase its processing speed by providing processors whose number is sufficient in comparison with the intensity of traffic, buffer memories for packets waiting for processing, and buffer memories for packets after processing and allowing one processor to perform the processing of only one packet. CONSTITUTION:An inputted packet is inputted to the processor which processes no packets among processors 51...5p through one of buffer memory 21-2n and an interface circuit 12 and is processed. After processed, the packet is immediately transferred to one of buffer memories 61...6p and is outputted to one of output terminals 31, m through one of flag adding circuits 71-7m. Since one processor processes one packet at a time and is not required to perform another control work, processing software is simplified and its processing speed is increased, and an extremely high speed is not requested to used processors.
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