发明名称 SOFT BIT VALUE GENERATION IN A SEQUENCE ESTIMATOR
摘要 Teachings presented herein offer reduced computational complexity for symbol sequence estimation, and also provide for the generation of soft bit values representing the reliability of that estimation. A demodulator is configured to generate these soft bit values by identifying a candidate value for each symbol in the sequence which is more likely than at least one other in a defined set of candidate values. Based on the candidate value identified for each symbol, the demodulator forms a reduced set of candidate values for the symbol by selecting as many additional candidate values from the defined set as are needed to have complementary bit values for each bit value in that identified candidate value. The demodulator calculates soft bit values for the symbol sequence based on a sequence estimation process whose state space for each symbol is constrained to the corresponding reduced set.
申请公布号 US2011026647(A1) 申请公布日期 2011.02.03
申请号 US20090510537 申请日期 2009.07.28
申请人 ZANGI KAMBIZ;RAMESH RAJARAM 发明人 ZANGI KAMBIZ;RAMESH RAJARAM
分类号 H04L27/06 主分类号 H04L27/06
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