| 摘要 |
The invention relates to a semiconductor device and its layout, which allows a larger number of capacitors within the same area to increase the cell density, which enables to get a larger number of semiconductor chips out of one wafer, and which retains a sufficient gap between bit lines to prevent SAC failure of the storage node, and to a method of fabricating the semiconductor device. In a layout for a semiconductor device including active regions, device isolation films for defining the active regions, bit lines and word lines, and a method of fabricating the semiconductor device of the invention, each active region comprises a first active region, a right active region located on the right side of the first active region, a left active region located on the left side of the first active region, an upper active region located on the upper side of the first active region and a lower active region located on the lower side of the first active region, wherein the first active region, the right active region, the left active region, the upper active region and the lower active region respectively include an inclined portion having a bit-line contact region; and first and second portions having a storage node contact region, the first end and the second end being respectively formed on the left and right ends of the inclined portion at a predetermined tilt angle with respect to the inclined portion, the active region having two word lines and one bit line intersecting one another.
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