发明名称 Integrated Circuit Memory Devices Having Vertical Transistor Arrays Therein and Methods of Forming Same
摘要 An integrated circuit device includes a transistor array having a vertical stack of independently controllable gate electrodes therein. A first semiconductor channel region is provided, which extends on a first sidewall of the vertical stack of independently controllable gate electrodes. A first electrically insulating layer is also provided, which extends between the first semiconductor channel region and the first sidewall of the vertical stack of independently controllable gate electrodes. Source and drain regions are provided, which are electrically coupled to first and second ends of the first semiconductor channel region, respectively.
申请公布号 US2011018051(A1) 申请公布日期 2011.01.27
申请号 US20100816771 申请日期 2010.06.16
申请人 发明人 KIM JI-YOUNG;WANG KANG L.;PARK YONG-JIK;HAN JEONG-HEE;HONG AUGUSTIN JINWOO
分类号 H01L27/115 主分类号 H01L27/115
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