| 摘要 |
<p>A method is disclosed relating to stacked wafer or die packaging with enhanced thermal and device performance, the method comprises providing a heat spreading and stress engineering layer 260 on a substrate surface 210, the substrate surface 210 being opposite a metallisation region 230 which, in turn, rests on a device layer 220 of the substrate; the metal layer 250 is then exposed by providing a via opening through the heat spreading and stress engineering layer 260, the substrate 210 and the device layer 220; a sidewall insulator 290 is provided on the side walls of the via opening and then the via opening is filled with a conductive material 295. Also disclosed is a method where a trench is formed in a substrate surface opposite a metallisation layer, the metallisation layer being formed on a device layer formed in the substrate; forming an insulating layer over the surface and trench; exposing the metallisation layer by forming a via through the insulating layer, the substrate and the device layer; forming a second insulating layer in the first insulating layer and via; exposing the metallisation layer again; selectively filling the trench and via opening with conductive material; such that the conductive material forms a conductive via and a heat spreading and stress engineering region.</p> |
