发明名称 Power mode control method and circuitry
摘要 In some embodiments, a power up (or power mode) interface is provided whereby a chip's power up signals are encoded into multiple states to provide more functions than the number of signals used to define the states.
申请公布号 US7877619(B2) 申请公布日期 2011.01.25
申请号 US20070967920 申请日期 2007.12.31
申请人 RACHAKONDA RAMANA;FANNING BLAISE;SABBAVARAPU ANIL K;KUTTANNA BELLIAPPA M;PATEL RAJESH;SHOEMAKER KENNETH D;HACKING LANCE E;FLEMING BRUCE L;CHOUBAL ASHISH V 发明人 RACHAKONDA RAMANA;FANNING BLAISE;SABBAVARAPU ANIL K;KUTTANNA BELLIAPPA M.;PATEL RAJESH;SHOEMAKER KENNETH D.;HACKING LANCE E.;FLEMING BRUCE L.;CHOUBAL ASHISH V.
分类号 G06F1/26;G06F1/00 主分类号 G06F1/26
代理机构 代理人
主权项
地址