发明名称 Floating well circuit operable in a failsafe condition and a tolerant condition
摘要 A circuit includes a first comparator block configured to output a voltage equal to a higher of a supply voltage and a bias voltage, a second comparator block configured to output a voltage equal to a higher of the bias voltage and an external voltage supplied through an Input/Output (IO) pad, and a third comparator block configured to output a voltage equal to a higher of the output of the first comparator block and the output of the second comparator block. A voltage across one or more constituent active element(s) of each of the first comparator block, the second comparator block, and the third comparator block is within an upper tolerable limit thereof during each of a normal operation, a failsafe operation, and a tolerant operation.
申请公布号 US7876132(B1) 申请公布日期 2011.01.25
申请号 US20090580280 申请日期 2009.10.16
申请人 LSI CORPORATION 发明人 KUMAR PANKAJ;PARAMESWARAN PRAMOD ELAMANNU;KOTHANDARAMAN MAKESHWAR;DESHPANDE VANI;KRIZ JOHN
分类号 H03B1/00 主分类号 H03B1/00
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