发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PROBLEM TO BE SOLVED: To operate more stably when a DLL circuit is reset. SOLUTION: A voltage comparison circuit 21 has a first level when the power supply voltage VAA is below a reference voltage REF, and delivers a comparison result signal of second level to a holding circuit 22 when the power supply voltage VAA exceeds the reference voltage REF. When the comparison result signal has the first level, the holding circuit 22 delivers an inputted reset signal RST, as it is, to a DLL circuit 23. When the comparison result signal has the second level; the holding circuit 22 holds the reset signal RST until the comparison result signal has the first level, and then delivers the reset signal RST to the DLL circuit 23. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2007324703(A) 申请公布日期 2007.12.13
申请号 JP20060149904 申请日期 2006.05.30
申请人 ELPIDA MEMORY INC 发明人 SUGIMOTO KEI
分类号 H03L7/081;H03L7/199 主分类号 H03L7/081
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