发明名称 Simulating real-time software components based on logical execution time
摘要 <p>One example of the invention relates to a system for simulating a real-time system using a block-oriented simulation with a static block-update order. The system comprises: a clock providing a time base for the simulation; a first task function block that includes a task release block, a task execution block, a task termination block, and a delay block; a first trigger block configured to trigger the task release block at a first time provided by the clock; and a second trigger block configured to trigger the task termination block at a third time provided by the clock. the task execution block is configured to calculate an output value dependent on an input value in accordance with a desired transfer function. The task release block is configured to receive input data from a data source and to set the input value of the task execution block dependent on the received data. The task termination block is configured to provide the output value of the task execution block as output data to a data sink. The first trigger function block or the second trigger function block is configured to trigger the task execution block at a second time provided by the clock. The delay block is arranged between the task release block and the task termination block.</p>
申请公布号 EP2275931(A1) 申请公布日期 2011.01.19
申请号 EP20100169147 申请日期 2010.07.09
申请人 WOLFGANG PREE GMBH 发明人 PREE, WOLFGANG;TEMPL, JOSEF;NADERLINGER, ANDREAS
分类号 G06F9/46;G06F9/44;G06F9/48;G06F17/50 主分类号 G06F9/46
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