发明名称 Wafer level chip scale package and fabricating method of the same
摘要 PURPOSE: A wafer level chip scale package and a fabricating method of the same are provided to disperse the around a solder ball by forming a metal post between a bonding pad and a redistribution layer. CONSTITUTION: A bonding pad is formed on the top of a semiconductor chip(101). A metal post(105) is perpendicularly formed in the bonding pad. An insulating layer(106) is formed on the top of the semiconductor chip in order to expose the end part of the metal post. One end of the redistribution layer(107) is connected to the metal post. The solder ball(111) is formed in the expanded part of the redistribution layer. A solder resist layer(110) is formed on the insulating layer and the redistribution layer. The open part of the solder resist layer exposes the solder ball.
申请公布号 KR101009200(B1) 申请公布日期 2011.01.19
申请号 KR20080061762 申请日期 2008.06.27
申请人 发明人
分类号 H01L23/48;H01L21/60;H01L23/28 主分类号 H01L23/48
代理机构 代理人
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