发明名称 |
Streaming direct inter-thread communication buffer packets that support hardware controlled arbitrary vector operand alignment in a densely threaded network on a chip |
摘要 |
A computer-implemented method, system and computer program product for arbitrarily aligning vector operands, which are transmitted in inter-thread communication buffer packets within a highly threaded Network On a Chip (NOC) processor, are presented. A set of multiplexers in a node in the NOC realigns and extracts data word aggregations from an incoming compressed inter-thread communication buffer packet. The extracted data word aggregations are used as operands by an execution unit within the node.
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申请公布号 |
US7873066(B2) |
申请公布日期 |
2011.01.18 |
申请号 |
US20090359777 |
申请日期 |
2009.01.26 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
MUFF ADAM J.;SHEARER ROBERT A.;TUBBS MATTHEW R. |
分类号 |
H04L12/54;G06F7/00;G06F13/38;H04J3/18 |
主分类号 |
H04L12/54 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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