发明名称 METHOD OF GENERATING INTERNAL VOLTAGE IN SEMICONDUCTOR DEVICE
摘要 PURPOSE: An internal voltage generating method is provided to improve the operational stability of an internal circuit like a transistor by reducing the change of an instantaneous negative voltage. CONSTITUTION: A plurality of internal voltages are generated in response to a power-up signal(PWRUP). The power-up signal has a logic level corresponding to the voltage level of a power supply voltage which is applied from the outside. A negative voltage(VBB) is generated from the activated time point of the power-up signal by receiving a ground voltage which is applied from the outside. A boosting voltage, which has a voltage level higher than a power voltage, is generated after estimated time than the activation time point of the power-up signal.
申请公布号 KR20110002282(A) 申请公布日期 2011.01.07
申请号 KR20090059792 申请日期 2009.07.01
申请人 HYNIX SEMICONDUCTOR INC. 发明人 SEO, JI TAI;LEE, GA YOUNG
分类号 G11C5/14;G11C7/20 主分类号 G11C5/14
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