发明名称 Integration for buried epitaxial stressor
摘要 Structures and methods of fabricating isolation regions for a semiconductor device. An example method comprises the following. We form one or more buried doped regions in a substrate. We form a stressor layer over the substrate. We form a strained layer over the stressor layer. We form STI trenches down through the strained layer and the stressor layer to as least partially expose the buried doped regions. We etch the buried doped regions to form at least a buried cavity in communication with the STI trenches. In the first and second embodiments, we fill only the STI trenches with insulation material to form isolation regions and form voids in the cavities. In the third and fourth embodiments, we fill both the STI trenches and the cavities with insulation material.
申请公布号 US7863141(B2) 申请公布日期 2011.01.04
申请号 US20060492649 申请日期 2006.07.25
申请人 CHARTERED SEMICONDUCTOR MANUFACTURING, LTD. 发明人 LIU JIN PING
分类号 H01L21/336 主分类号 H01L21/336
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