The processing information has six device inputs, a device output, three AND gates, an OR gate. It comprises in addition the seventh device input, the fourth AND gate, a modulo 2 adder unit.
申请公布号
UA56114(U)
申请公布日期
2010.12.27
申请号
UA20100009205U
申请日期
2010.07.22
申请人
"KHARKIV AVIATION INSTITUTE", M.ZHUKOVSKYI NATIONAL AEROSPACE UNIVERSITY
