发明名称 TESTING METHOD FOR SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE, SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND TESTING SYSTEM
摘要 PROBLEM TO BE SOLVED: To perform a stable test, without reducing the number of chips at one test. SOLUTION: In a method for dividing the semiconductor integrated circuit device (corresponding to S1 and S2) into a plurality of groups and testing them simultaneously, in at least one group, the semiconductor integrated circuit device is made to operate by a clock signal (corresponding to CLK1 and CLK2) of a frequency that differs from those of the other groups. COPYRIGHT: (C)2011,JPO&INPIT
申请公布号 JP2010286282(A) 申请公布日期 2010.12.24
申请号 JP20090138466 申请日期 2009.06.09
申请人 RENESAS ELECTRONICS CORP 发明人 SEYA SHUNICHI
分类号 G01R31/26;H01L21/66 主分类号 G01R31/26
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