发明名称 |
LOW-CURRENT LOGIC-GATE CIRCUIT |
摘要 |
<p>The circuit comprises E-mode transistors (E3, E4, E5) with gate-source junction, a D-mode transistor (D) with gate- source junction, a component generating a voltage drop (E1, E2) between the source (4) of the D-mode transistor and the drain (2) of an E-mode transistor provided as a signal output (OUT), a connection (7) between this drain (2) of the E-mode transistor and the gate (6) of the D-mode transistor, and a signal input (IN) at the gates (3, 24, 27) of the E-mode transistors. The E-mode transistors are arranged to operate as NAND and/or NOR logics. The circuit enables the operation of logic circuitry in GaAs technology with only low currents flowing.</p> |
申请公布号 |
WO2010146051(A1) |
申请公布日期 |
2010.12.23 |
申请号 |
WO2010EP58388 |
申请日期 |
2010.06.15 |
申请人 |
EPCOS AG;SPITS, ERWIN;VAN DEN OEVER, LEON, C., M. |
发明人 |
SPITS, ERWIN;VAN DEN OEVER, LEON, C., M. |
分类号 |
H03K19/094;H03K19/0944 |
主分类号 |
H03K19/094 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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