发明名称 |
A DUAL FUNCTION ADDER FOR COMPUTING A HARDWARE PREFETCH ADDRESS AND AN ARITHMETIC OPERATION VALUE |
摘要 |
A system including a dual function adder is described. In one embodiment, the system includes an adder. The adder is configured for a first instruction to determine an address for a hardware prefetch if the first instruction is a hardware prefetch instruction. The adder is further configured for the first instruction to determine a value from an arithmetic operation if the first instruction is an arithmetic operation instruction. |
申请公布号 |
KR20100134005(A) |
申请公布日期 |
2010.12.22 |
申请号 |
KR20107022131 |
申请日期 |
2009.02.23 |
申请人 |
QUALCOMM INCORPORATED |
发明人 |
INGLE AJAY A.;PLONDKE ERICH J.;CODRESCU LUCIAN |
分类号 |
G06F9/30;G06F9/302;G06F9/312 |
主分类号 |
G06F9/30 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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