发明名称 Compiler apparatus
摘要 A compiler apparatus, which can perform software pipelining optimization that has a considerable effect of reducing the number of execution cycles taken to complete a loop process, converts a source program into a machine program for a processor which is capable of parallel processing. The compiler apparatus is composed of: a parsing unit operable to parse the source program and then to convert the source program into an intermediate program which is described in an intermediate language; an optimization unit operable to optimize the intermediate program; and a conversion unit operable to convert the optimized intermediate program into the machine language program, wherein the optimization unit is operable to execute software pipelining, by inserting a transfer instruction, which is used for transferring data between operands, into a loop process included in the intermediate program so that a data dependence relation is changed.
申请公布号 US7856629(B2) 申请公布日期 2010.12.21
申请号 US20060420059 申请日期 2006.05.24
申请人 PANASONIC CORPORATION 发明人 MICHIMOTO SHOHEI;HEISHI TAKETO;OGAWA HAJIME;KAWABATA TERUO
分类号 G06F9/45 主分类号 G06F9/45
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