发明名称 Channel strain engineering in field-effect-transistor
摘要 There is disclosed a method of applying stress to a channel region underneath a gate of a field-effect-transistor, which includes the gate, a source region, and a drain region. The method includes steps of embedding stressors in the source and drain regions of the FET; forming a stress liner covering the gate and the source and drain regions; removing a portion of the stress liner, the portion of the stress liner being located on top of the gate of the FET; removing at least a substantial portion of the gate of a first gate material and thus creating an opening therein; and filling the opening with a second gate material.
申请公布号 US7842592(B2) 申请公布日期 2010.11.30
申请号 US20070760056 申请日期 2007.06.08
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION;INFINEON TECHNOLOGIES AG 发明人 DYER THOMAS;KRISHNASAMY RAJENDRAN;HAN JIN-PING;DEMM ERNST
分类号 H01L21/3205;H01L21/4763 主分类号 H01L21/3205
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