发明名称 User-accessible freeze-logic for dynamic power reduction and associated methods
摘要 A programmable logic device (PLD) includes a configuration circuit, and first and second freeze-logic circuits. The configuration circuit provides configuration data for configuring programmable resources of the PLD during a configuration mode of the PLD. One of the two freeze-logic circuits provides a freeze logic signal during the configuration mode of the PLD. The other freeze-logic circuit provides a freeze logic signal during a user mode of the PLD.
申请公布号 US7839165(B2) 申请公布日期 2010.11.23
申请号 US20090577061 申请日期 2009.10.09
申请人 ALTERA CORPORATION 发明人 HUTTON MICHAEL D.;LEE ANDY L.
分类号 H03K19/173 主分类号 H03K19/173
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