METHOD AND PROCESSOR FOR IMPROVED AES ENCRYPTION AND DECRYPTION

摘要

Encrypting information involving the execution of a first instruction and a second instruction on a processor. The first instruction causes the processor to perform an AddRoundKey transformation followed by a ShiftRows transformation. The second instruction causes the processor to perform a ShiftRows transformation followed by a MixColumns transformation. These instructions are useful for performing AES encryption. The first and second instructions also have inverse modes that may be used to perform AES decryption.