发明名称 METHOD OF MANUFACTURING TRANSISTOR
摘要 PROBLEM TO BE SOLVED: To solve the problem, wherein even though impurities in a gate insulating layer can be inactivated by forming a metal layer which comprises aluminum and magnesium and then thermally treating at around 400°C, the metal layer is not appropriate as a gate electrode because hillocks tend to occur, and a new gate electrode is required to form by removing the metal layer once, but in that step, a gate insulating layer is required to expose to an etching atmosphere, resulting in the possibility of degradation in the gate insulating layer. SOLUTION: TiN is deposited by a sputtering method, and then etching is performed to form a first gate electrode 106. Then, a catalyst metal layer 108 whose main component is aluminum is deposited by using a sputtering method, and the like. With the catalyst metal layer 108 deposited, it is subjected to a thermal treatment at 400°C for one hour. By the thermal treatment, the defective level density at the interface between a gate insulating layer 15, and a semiconductor layer 13 can be lowered. COPYRIGHT: (C)2011,JPO&INPIT
申请公布号 JP2010262965(A) 申请公布日期 2010.11.18
申请号 JP20090110469 申请日期 2009.04.30
申请人 SEIKO EPSON CORP 发明人 MIYASHITA KAZUYUKI
分类号 H01L21/336;H01L21/20;H01L21/28;H01L29/423;H01L29/49;H01L29/786 主分类号 H01L21/336
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