<p>Disclosed is a JFET (100) which is a semiconductor device that can be manufactured at a reduced cost. The JFET (100) comprises a silicon carbide substrate (1), an active layer (8) that is formed from single crystal silicon carbide and arranged on one main surface of the silicon carbide substrate (1), a source electrode (92) that is arranged on the active layer (8), and a drain electrode (93) that is arranged on the active material layer (8) at a distance from the source electrode (92). The silicon carbide substrate (1) contains a base layer (10) that is formed from single crystal silicon carbide and an SiC layer (20) that is arranged on the base layer (10). The defect density of the SiC layer (20) is lower than the defect density of the base layer (10).</p>
申请公布号
WO2010131571(A1)
申请公布日期
2010.11.18
申请号
WO2010JP57443
申请日期
2010.04.27
申请人
SUMITOMO ELECTRIC INDUSTRIES, LTD.;FUJIKAWA, KAZUHIRO;HARADA, SHIN;NISHIGUCHI, TARO;SASAKI, MAKOTO;NAMIKAWA, YASUO;FUJIWARA, SHINSUKE