发明名称 |
Circuit and method for reducing output noise of regulator |
摘要 |
A circuit and a method for reducing output noise when a pulse width modulation mode is started. A pulse width modulation circuit generates a first pulse signal having a duty cycle that is in accordance with an output voltage of a regulator circuit. A drive circuit generates the output voltage from an input voltage in response to the first pulse signal provided from the pulse width modulation circuit. A feed forward circuit controls the pulse width modulation circuit in a manner to generate the first pulse signal having a duty cycle that maintains the output voltage at a desired level before the pulse width modulation circuit provides the first pulse signal to the drive circuit.
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申请公布号 |
US7834601(B2) |
申请公布日期 |
2010.11.16 |
申请号 |
US20070937959 |
申请日期 |
2007.11.09 |
申请人 |
FREESCALE SEMICONDUCTOR, INC. |
发明人 |
AIURA MASAMI;EGAWA KANJI;MURAKAMI SHINTAROH |
分类号 |
G05F1/40;H02M7/10 |
主分类号 |
G05F1/40 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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