发明名称 Verification Method for Nonvolatile Semiconductor Memory Device
摘要 The present invention provides nonvolatile semiconductor memory devices which operate with low power consumption. In a nonvolatile semiconductor memory device, a plurality of nonvolatile memory elements are connected in series. The plurality of nonvolatile memory elements include a semiconductor layer including a channel forming region and a control gate provided to overlap with the channel forming region. Operations of write, erase, a first read, and a second read in a verify operation of data to the nonvolatile memory elements, are conducted by changing voltage to the control gates of the nonvolatile memory elements. The second read in the verify operation after erase operation is conducted by changing only one of a potential of the control gate of a nonvolatile memory element which are selected from the plurality of nonvolatile memory elements, and as the potential, a potential different from a potential of the first read is used.
申请公布号 US2010277985(A1) 申请公布日期 2010.11.04
申请号 US20100836243 申请日期 2010.07.14
申请人 SEMICONDUCTOR ENERGY LABORATORY CO., LTD. 发明人 MIYAKE HIROYUKI;OSAME MITSUAKI;MIYAZAKI AYA
分类号 G11C16/06 主分类号 G11C16/06
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