发明名称 MEMORY SYSTEM
摘要 A memory system includes a WC 21 from which data is read out and to which data is written in sector units by a host apparatus, an FS 12 from which data is read out and to which data is written in page units, an MS 11 from which data is read out and to which data written in track units, an FSIB 12a functioning as an input buffer for the FS 12, and an MSIB 11a functioning as an input buffer to the MS 11. An FSBB 12ac that has a capacity equal to or larger than a storage capacity of the WC 21 and stores data written in the WC 21 is provided in the FSIB12a. A data managing unit 120 that manages the respective storing units suspends, when it is judged that one kind of processing performed among the storing units exceeds predetermined time, the processing judged as exceeding the predetermined time and controls the data written in the WC 21 to be saved in the FSBB 12ac.
申请公布号 US2010281204(A1) 申请公布日期 2010.11.04
申请号 US20080529193 申请日期 2008.09.22
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 YANO JUNJI;MATSUZAKI HIDENORI;HATSUDA KOSUKE
分类号 G06F12/00;G06F12/02;G06F12/08 主分类号 G06F12/00
代理机构 代理人
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