LOGIC CIRCUIT FOR DETECTING AND RECOVERING ERROR IN SRAM-BASED FIELD PROGRAMMABLE GATE ARRAY

摘要

PURPOSE: A logic circuit for detecting and recovering errors in a SRAM-based field programmable gate array is provided to perform error detection and an error selection function. CONSTITUTION: First circuit units(10,20) generate a first output value by using a time redundancy method about data 0 and data 1. A second circuit unit(30) receives the first output value from the first circuit units. The second circuit unit creates a time redundancy comparison output value and hardware spare comparison output value using the first output value. The second circuit unit detects errors of the first circuit units using the time redundancy comparison output value and hardware spare comparison output value.