发明名称 |
CAPACITOR TOP PLATE OVER SOURCE/DRAIN TO FORM A 1T MEMORY DEVICE |
摘要 |
<p>A method and structure for a memory device, such as a 1T-SRAM, having a capacitor top plate directly over a doped bottom plate region. An example device comprises the following. An isolation film formed as to surround an active area on a substrate. A gate dielectric and gate electrode formed over a portion of the active area. A source element and a drain element in the substrate adjacent to the gate electrode. The drain element is comprised of a drain region and a bottom plate region. The drain region is between the bottom plate region and the gate structure. A capacitor dielectric and a capacitor top plate are over at least portions of the bottom plate region. Fig. 7A</p> |
申请公布号 |
SG165374(A1) |
申请公布日期 |
2010.10.28 |
申请号 |
SG20100066348 |
申请日期 |
2008.02.05 |
申请人 |
GLOBALFOUNDRIES SINGAPORE PTE. LTD. |
发明人 |
WEE TEO LEE;MENG LEE YONG;ZHAO LUN;WOH LAI CHUNG;SENG TAN SHYUE;CHEE JEFFREY;MISHRA SHAILENDRA;WIDODO JOHNNY |
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