发明名称 FLAT LEADLESS PACKAGES AND STACKED LEADLESS PACKAGE ASSEMBLIES
摘要 A flat leadless package includes at least one die mounted onto a leadframe and electrically connected to leads using an electrically conductive polymer or an electrically conductive ink. Also, an assembly includes stacked leadless packages electrically connected to leads using an electrically conductive polymer or an electrically conductive ink. Also, a package module includes an assembly of stacked leadless packages mounted on a support and electrically connected to circuitry in the support using an electrically conductive polymer or an electrically conductive ink.
申请公布号 KR20100115784(A) 申请公布日期 2010.10.28
申请号 KR20107019120 申请日期 2009.02.18
申请人 VERTICAL CIRCUITS, INC. 发明人 ANDREWS JR. LAWRENCE DOUGLAS;LEAL JEFFREY S.;MCELREA SIMON J. S.
分类号 H01L23/48;H01L23/12;H01L23/495 主分类号 H01L23/48
代理机构 代理人
主权项
地址