发明名称 ERASE METHOD OF NONVOLATILE SEMICONDUCTOR MEMORY DEVICE
摘要 <p><P>PROBLEM TO BE SOLVED: To provide an erase method for a nonvolatile semiconductor memory device which is excellent in holding characteristics. <P>SOLUTION: The nonvolatile semiconductor memory device has a semiconductor substrate 1 on which the source drain areas 2, 3 are formed at an interval, a first insulating layer 7 formed on the semiconductor substrate 1, a first gate electrode 5 formed on a first area 10 on the first insulating layer 7, the electric charge accumulating layers 8 formed on second areas 11, 12 on the first insulating layer 7, second insulating layers 9 formed on the electric charge accumulating layers 8, and second gate electrodes 4, 6 formed on the second insulating layers 9. The erase method for a nonvolatile semiconductor memory device has a step in which hot hole is injected into electric charge accumulating layers from source drain areas and a step in which a channel hot electron is injected into the areas on a first gate electrode side of the electric charge accumulating layers. <P>COPYRIGHT: (C)2011,JPO&INPIT</p>
申请公布号 JP2010244641(A) 申请公布日期 2010.10.28
申请号 JP20090093894 申请日期 2009.04.08
申请人 RENESAS ELECTRONICS CORP 发明人 TAKEUCHI HIDEYO
分类号 G11C16/02;G11C16/04;H01L21/8247;H01L27/115;H01L29/788;H01L29/792 主分类号 G11C16/02
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