发明名称 |
Asynchronous interconnection system for 3D interchip communication |
摘要 |
An embodiment of the present invention relates to a asynchronous interconnection system comprising a transmitter circuit and a receiver circuit inserted between inserted between respective first and second voltage references and having respective transmitter and receiver nodes coupled in a capacitive manner. The receiver circuit comprises: a recovery stage inserted between the first and second voltage references of the receiver circuit and connected to the receiver node; and a state control stage, in turn inserted between the first and second voltage references of the receiver circuit connected to the recovery stage correspondence with a first feedback node providing a first control signal and having a second feedback node connected in a feedback manner to the recovery stage. The recovery stage comprises a first feedback loop connected to the first feedback node and acting in such a way to recover a received voltage signal and a feedback loop connected to the second feedback node of the state control stage and acting in such a way to deactivate the recovery feedback on the receiver node and guarantee that the receiver node is let in a high impedance state.
|
申请公布号 |
US7821293(B2) |
申请公布日期 |
2010.10.26 |
申请号 |
US20070006102 |
申请日期 |
2007.12.28 |
申请人 |
STMICROELECTRONICS, S.R.L. |
发明人 |
FAZZI ALBERTO;CICCARELLI LUCA;MAGAGNI LUCA;CANEGALLO ROBERTO;GUERRIERI ROBERTO |
分类号 |
H03K19/003 |
主分类号 |
H03K19/003 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|