PULSE-SHRINKING DELAY LINE BASED ON FEED FORWARD

摘要

A shrinking-pulse digital delay line (400) has a cascade of a plurality of stages (102,104) for modifying a width of a pulse propagating down the cascade (106 to 118). Each specific one of the stages has an input (106,116), an output (108,118) and a main path (110,112,120,122) between the input and the output. The main path has a first inverter (110,120) and a second inverter (112,122) connected in series via an intermediate node (114,124). Each specific stage has a third inverter (128,140) connected between the input and the intermediate node of a downstream stage in the cascade (102,104); and also has a fourth inverter (132,144) connected between the intermediate node of the specific stage (mode 114, stage 102, mode 124, stage 104) and the output (118, stage 104) of the downstream stage (stage 104).