| 摘要 |
A semiconductor device including a gate insulating layer formed over a semiconductor substrate; a gate insulating layer pattern formed over an exposed uppermost surface of the semiconductor substrate along the same horizontal plane as the gate insulating layer; an isolation insulating layer formed over the gate insulating layer; a plurality of first gate conductive patterns formed over the gate insulating layer and the gate insulating layer pattern; a source/drain conductor formed over an exposed uppermost surface of the semiconductor substrate; a second gate conductive pattern formed over one of the plurality of the first gate conductive patterns that is provided over the gate insulating layer pattern; a plurality of salicide layers formed over the second gate conductive pattern, the source/drain conductor, and at least one of the plurality of first gate conductive patterns that are provided over the gate insulating layer; and a pair of spacers formed over the gate insulating layer pattern and on sidewalls of one of the plurality of first gate conductive patterns that is provided over the gate insulating layer pattern, the second gate conductive pattern, and the plurality of salicide layers.
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