| 摘要 |
A frequency divider includes a transmission gate, a first inverter, a first switch circuit, a second switch circuit, and a second inverter. The transmission gate transmits a clock signal according to an inverted enable signal. The first inverter inverts the clock signal outputted from the transmission gate. The first switch circuit generates a first control signal according to the inverted clock signal and an output signal of the frequency divider. The second switch circuit generates a second control signal according to the clock signal, the inverted clock signal, and the first control signal. The second inverter inverts the second control signal to generate the output signal. The frequency of the clock signal is a multiple of the frequency of the output signal.
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