发明名称 VIA DESIGN APPARATUS AND VIA DESIGN METHOD
摘要 A via design apparatus for designing a via providing connections between a plurality of layers inside a multilayer board includes: a determination section that determines a value of a shape parameter indicating a shape of a via in the multilayer board, the via having a hole passing through the plurality of layers and a conductive section on a side wall of the hole; and a calculation section that calculates a value of impedance of the via according to the value of the shape parameter.
申请公布号 US2010251200(A1) 申请公布日期 2010.09.30
申请号 US20100781009 申请日期 2010.05.17
申请人 FUJITSU LIMITED 发明人 MORI HIROFUMI;YAMADA JUN
分类号 G06F17/50 主分类号 G06F17/50
代理机构 代理人
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