发明名称 Power Management Integrated Circuit, Power Management Method, and Display Apparatus
摘要 Power management integrated circuit and related devices. A clock generator generates a periodic signal. Based on the periodic signal and a feedback signal, a pulse width modulator generates a control signal, based on which a driver drives a power switch. A power terminal is connected to an external capacitor. A linear regulator connected to the power terminal generates and supplies an internal power source. Powered by the internal power source, a bandgap generator provides a bandgap reference voltage. A standby control terminal receives a standby signal. When the standby signal is asserted, the clock generator, the pulse with modulator and the driver are at a disabled state, and the linear regulator and the bandgap generator at an enabled state.
申请公布号 US2010245323(A1) 申请公布日期 2010.09.30
申请号 US20100723679 申请日期 2010.03.14
申请人 CHIA JU-LIN 发明人 CHIA JU-LIN
分类号 G06F3/038;G05F1/10 主分类号 G06F3/038
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