| 摘要 |
PURPOSE: An impedance calibration circuit for a semiconductor memory device is provided to efficiently support an impedance matching operation by transmitting a digital code, which is generated by regulating the level of a reference voltage, to a driver in a buffer. CONSTITUTION: A reference voltage generator(10) generates a reference voltage(Vref). A pull-up code generator(20) generates a pull-up code(pu<1:6>) in response with the standard voltage. A pull-down code generator(30) generates a pull-down code(pd<1:6>) in response with the reference voltage. An external resistance is connected with the pull-up code generator through a ZQ pad(PAD). |
