发明名称 Watermarking a chip design based on frequency of geometric structures
摘要 A method for watermarking a circuit design layout based on frequency or number of geometric structures. The method includes dividing a circuit design layout into a plurality of segments or tiles. Certain segments are selected, and within these selected segments, a router alters the number of geometric structures, such as vias and jogs, of the circuit design layout in the selected segments to form the watermark without relying on a netlist. The number of geometric structures is changed slightly so that a random sampling of segments would not identify the watermark since the variations would not be detectable or would be within acceptable variances, but the watermark would be readily identified if the selected segments are known. The watermark or portions thereof can be used to encode one or more data bits.
申请公布号 US7801325(B1) 申请公布日期 2010.09.21
申请号 US20060478290 申请日期 2006.06.29
申请人 CADENCE DESIGN SYSTEMS, INC. 发明人 HETZEL ASMUS;PEYROT IVAN Q.
分类号 G06K9/00;H04L9/32 主分类号 G06K9/00
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