发明名称 SPARE CELL LIBRARY DESIGN FOR INTEGRATED CIRCUIT
摘要 A cell based design layout of an application specific integrated circuit (ASIC) having a function has reduceddecreased power leakage because functionally unconnected additional cells or spare cells of the integrated design layout are unconnected to the power supplies Vdd and Vss.
申请公布号 US2010231256(A1) 申请公布日期 2010.09.16
申请号 US20090400849 申请日期 2009.03.10
申请人 FREESCALE SEMICONDUCTOR, INC 发明人 JAIN SIDDHARTHA;AGARWAL GAURAV;DESAI ANKIT;SHARMA ANURAG
分类号 H03K19/177;H01L21/82 主分类号 H03K19/177
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