| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To improve a yield of a chip by suppressing a leakage component from the end part of an active row decoder in an NAND type flash memory to a guard ring region, and by preventing transfer performance of a transfer gate transistor of the end part in the active row decoder from deteriorating. <P>SOLUTION: The NAND type flash memory includes: the active row decoder 40 which is formed near the end in a row direction of a memory cell array 10 while forming the transfer gate transistors 341 and 342 for transferring voltage to a word line or a selection gate line in element regions arranged in a matrix form; the guard ring region 43 arranged between the active row decoder and a cell array; and a dummy row decoder 44 formed between the guard ring region and the active row decoder. Source nodes of dummy transfer gate transistors 461 and 462 formed in a dummy element region 45 of the dummy row decoder 44 are not connected to a word line WLi and a selection gate line SGS. <P>COPYRIGHT: (C)2010,JPO&INPIT</p> |
