发明名称 |
STORAGE DEVICE AND INFORMATION RERECORDING METHOD |
摘要 |
<p>A storage device capable of decreasing the number of voltages necessitating control and decreasing peripheral circuit size is provided. A first pulse voltage (VBLR) is supplied from a first power source through a bit line BLR to an electrode of a variable resistive element. A second pulse voltage (VWL) for selecting a cell is supplied from a second power source through a word line WL to a control terminal of a transistor. A third pulse voltage (VBLT) is supplied from a third power source though a bit line BLT to a second input/output terminal of the transistor. At the time of rewriting information, the voltage value (VBLT) of the third power source is adjusted by an adjustment circuit. Thereby, a cell voltage and a cell current are changed (decreased or increased).</p> |
申请公布号 |
KR20100097678(A) |
申请公布日期 |
2010.09.03 |
申请号 |
KR20107012517 |
申请日期 |
2008.12.11 |
申请人 |
SONY CORPORATION |
发明人 |
SHIIMOTO TSUNENORI;TSUSHIMA TOMOHITO;YASUDA SHUICHIRO |
分类号 |
G11C13/00;G11C5/14;G11C7/10 |
主分类号 |
G11C13/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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