| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a TFT substrate capable of suppressing alignment treatment unevenness caused by level difference by a wiring line, an electrode and the like, reducing generation of an alignment defect and shortening charging time. Ž<P>SOLUTION: The thin film transistor substrate includes a base material 2, a gate line formed on the base material, a gate insulating layer 4, an overcoat layer 6, a source line, a pixel electrode 8, and a TFT 10 having a gate electrode 13 connected to the gate line formed on the base material 2, a gate insulating layer 14 for the TFT, a semiconductor layer 15 formed on the gate insulating layer for the TFT, an overcoat layer 16 for the TFT formed on the gate insulating layer for the TFT and the semiconductor layer continuously to the overcoat layer, a source electrode 17 formed on the overcoat layer for the TFT, connected to the source line and connected to the semiconductor layer via a contact hole h1 for the source electrode and a transparent electrode 18 formed on the overcoat layer for the TFT, connected to the pixel electrode, and connected to the semiconductor layer via a contact hole h2 for the transparent electrode. Ž<P>COPYRIGHT: (C)2010,JPO&INPIT Ž
|
