发明名称 CIRCUIT AND METHOD FOR HOLDING STATE
摘要 <P>PROBLEM TO BE SOLVED: To easily obtain generation sequences of a plurality of status signals. Ž<P>SOLUTION: A state holding circuit includes M-stage (M is an integer of two or more) state holding parts connected to one another. Each of the M-stage state holding parts includes N latches that respectively correspond to input signals from N (N is an integer of two or more) kinds of input terminals. The state holding circuit further includes a switching circuit for setting the j-th latch among the N latches held by the i-th state holding part among the M-stage stage holding parts when a status signal is input to the j-th input terminal among N kinds of input terminals at the i-th timing. Ž<P>COPYRIGHT: (C)2010,JPO&INPIT Ž
申请公布号 JP2010191849(A) 申请公布日期 2010.09.02
申请号 JP20090037595 申请日期 2009.02.20
申请人 RENESAS ELECTRONICS CORP 发明人 TAKEUCHI TOSHIO
分类号 G06F11/34 主分类号 G06F11/34
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