发明名称 Precise dynamic hysteresis
摘要 An analog comparator circuit with associated hysteresis logic operably disposed to provide a logic switching mechanism based upon an input voltage level includes a voltage comparator block operably disposed to receive a voltage input signal at a positive terminal of the voltage comparator block and a selected reference voltage at a negative terminal of the voltage comparator block and is operable to produce a logic output based upon a favorable comparison. The hysteresis logic block is operable to produce one of a plurality of reference voltage levels to the negative terminal of the voltage comparator block as the selected reference voltage based upon a two-level reference signal input and further based upon a detected transition in logic of an output produced by the voltage comparator block wherein the output is received by the hysteresis logic block in a feedback signal.
申请公布号 US7787527(B2) 申请公布日期 2010.08.31
申请号 US20050246940 申请日期 2005.10.07
申请人 BROADCOM CORPORATION 发明人 KAPPES MICHAEL S.;BEHZAD ARYA REZA
分类号 H04B1/38;H04L5/16 主分类号 H04B1/38
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