发明名称 ADJACENT WORDLINE DISTURB REDUCTION USING BORON/INDIUM IMPLANT
摘要 Semiconductor devices having reduced parasitic current and methods of malting the semiconductor devices are provided. Further provided are memory devices having reduced adjacent wordline disturb. The memory devices contain wordlines formed over a semiconductor substrate, wherein at least one wordline space is formed between the wordlines. Adjacent wordline disturb is reduced by implanting one or more of indium, boron, and a combination of boron and indium in the surface of the at least one wordline space.
申请公布号 US2010213535(A1) 申请公布日期 2010.08.26
申请号 US20090390550 申请日期 2009.02.23
申请人 SPANSION LLC 发明人 KATHAWALA GULZAR A.;LIU ZHIZHENG;CHANG KUO TUNG;XUE LEI
分类号 H01L29/792;H01L21/336;H01L21/425 主分类号 H01L29/792
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