DISPLAY APPARATUS, DISPLAY METHOD, AND DISPLAY PROGRAM

摘要

Disclosed is a high-response display apparatus in which the power consumption thereof can be reduced and the process time to rewrite the display can be reduced.  At step (S106), a first clock (PCK) is supplied to an arithmetic operation unit (104).  A generated second clock (MCK) is converted by a clock converter (105) to generate a converted clock (CCK).  The converted clock (CCK) is supplied to a clock supply block (107).  A RAM (15) among the peripheral devices periodically executes writing of information in synchronization with the converted clock (CCK).  At step (S107), the arithmetic operation unit (104) executes the operation according to a control program in synchronization with the first clock (PCK).  At step (S112), the supply of the first clock (PCK) to the arithmetic operation unit (104) is terminated and the operation according to the control program is terminated.  During the termination, the converted clock is supplied to the peripheral devices and the power supply to the RAM (15) continues.