| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To prevent racing in scan operation without a MIN guaranty gate. <P>SOLUTION: The disclosed flip-flop circuit, which a selector portion 10 for switching between a data input and scan input corresponding to a scan mode signal, a master latch portion 20 latching the output data of the selector portion by a master latch control clock in phase with a clock signal or in the opposite phase thereto, and a slave latch portion 30 latching the output of the master latch portion with a slave latch clock in the opposite phase to the clock signal or in phase thereto are connected in series, is composed so that a clock control portion 40 can prevent racing without inserting a MIN security gate for delay between a flip-flop of the next stage by delaying the timing of a clock to control a slave latch portion than that of a clock to control a master latch during a scan operation. <P>COPYRIGHT: (C)2010,JPO&INPIT</p> |
